Tanner EDA and Aldec Deliver High-Performance A/MS Solution for Mixed-Signal IC Design and Verification
Tanner EDA, the catalyst for innovation in the design, layout and verification of analog and mixed-signal integrated circuits (ICs), and Aldec, Inc., an industry leader in mixed VHDL, Verilog and SystemVerilog simulation, have collaborated to deliver an integrated co-simulation solution for analog and mixed-signal (A/MS) design. Tanner EDA’s new HiPer Simulation A/MS offers their T-Spice … Continued